The following content has been provided by the University of Erlang and Nuremberg.
No, no, no. Thank you so much. Thank you. Thank you for inviting me. And I'm really glad to
be here and to share with you some of the work that my research group is doing at National
University of Singapore. So in case you have never been to Asia, Singapore is called the
gateway to Asia. So it's the easiest introduction you can get to Asia. So I invite you to come
to Singapore if you do get a chance to be in the region.
By the way, feel free to ask me any questions as we go along in the talk. I would prefer
that. So just feel free to ask me questions. So today I'm going to talk about heterogeneous
multicores in the dark silicon era. And I guess I don't need to give that much introduction
for this group because invasive computing is all about heterogeneous multicores. But
I guess the kind of heterogeneous multicores I'm going to talk about today is somewhat
different from the kind of heterogeneity that you are exploring in this chair. So we are
of course firmly in the multicore era and we have already hit the power wall and we
are going to get more and more cores on chip. But today what is happening is that most of
these cores are really kind of homogeneous in nature so you have the more of the same
thing on the chip. But with that what is happening is that one of the problems that's creeping
up is this problem of dark silicon. And what is happening is that of course due to Moore's
law you are getting more and more transistors on chip, right? So Moore's law is not failing
yet and so you are going to get more and more transistors. But what is happening is that
there is an associated law which is kind of denard scaling that's failing. And what happens
because of that is that even though your transistor size is getting smaller you are not reducing
the power per transistor. So when that happens here is what is the problem that you are going
to see. So let's suppose that this is a chip that you had. It has a single core. In 2008
it was at 45 nanometer and it was consuming one unit of power. It was running at unit
frequency and it has unit area. Now when you try to scale it down, so if you go down to
2014 and we are looking at 22 nanometer design, so this particular core that was occupying
this entire area now is occupying only one fourth of the area. So that's really nice
because now we can put four cores on the chip and that's what multicore is all about. Unfortunately
what is happening is that your power requirement for this core still remains the same. That
means now if you put four of these cores together then they are going to consume four units
of power instead of this particular chip which was consuming just one unit of power. Unfortunately
your thermal cooling capacity and things like that are not improving. So your thermal design
power budget still remains the same. So if you had one unit of thermal design power at
this point, you still have one unit of thermal design power at this point. So what happens
because of that is that, so let's suppose I had one watt here so I still have one watt.
Now if I switch on all the four cores then I am going to consume four watt and so clearly
I cannot actually do that so I have to switch off some of the cores. So in this case what
happens is that you are going to switch off all the three cores and you are left with
just 25% of the silicon area that you can exploit at any point in time. And this is
going to get worse and worse if you are looking at 2020. This is a prediction from ARM based
on the roadmap for frequency and power and things like that that you are going to get
only 10% usable chip area. So that means that even if you put 100 cores on chip you are
only going to be able to use 10 of these cores at any point in time. So what can you do about
this? Well you can be a very pessimistic person about it and you can say that well I can have
this entire very big chip and I can put 1000 cores on that chip but since I can only use
hundreds of them why bother? Let me just go with a smaller chip and let's just put 100
cores on it. You can do that but that's not nice both from the industry perspective because
then you don't have anything to do and of course from academic perspective because we
have no research to do. So we would like to be more optimistic about it and we would like
to come up with some solution to this challenge and get kind of something out of this very
Presenters
Prof. Dr. Tulika Mitra
Zugänglich über
Offener Zugang
Dauer
01:00:43 Min
Aufnahmedatum
2014-03-21
Hochgeladen am
2014-03-28 14:53:05
Sprache
de-DE
Prof. Mitra (National University of Singapore)
Moore´s Law enables continued increase in the number of cores on chip; but power and thermal limits imply that a significantfraction of these cores have to be left switched off --- or dark --- at any point in time.This phenomenon, known as darksilicon, is driving the emergence of heterogeneous/asymmetric computing platforms consisting of cores with diverse power-performance characteristics enabling better match between the application requirements and the compute engine leading tosubstantially improved energy-efficiency. In this talk, we present the challenges and opportunities offered by static andadaptive heterogeneous multi-cores towards low-power, high-performance mobile computing.
For static asymmetric multi-cores, we present a comprehensive power management framework that can provide highperformance while minimizing energy consumption within the thermal design power budget. We then describe an adaptiveheterogeneous multi-core architecture, called Bahurupi, that can be tailored according to the application by software.Bahurupi is designed and fabricated as a homogeneous multi-core system containing identical simple cores. Post-fabrication,software can configure or compose together the primitive cores to create a heterogeneous multi-core that best matches theneeds of the currently executing application.